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Comparing the shift register specified in 802.11 with the shift register implementated using a comm.PNSequence System object, note that the two shift register schematics are mirror images of each other. Therefore, when configuring the comm.PNSequence System object to implement an additive scrambler, you must reverse values for the generator polynomial, the initial states, and the mask output. To take the output of the register from the leading end, specify a shift value of 7.
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